The following is an example of the test procedure performed on a Galaga PCB, utilizing the GLS1 Electronics Computer Aided Testing System, certifying the electronics has undergone the quality control requirements set forth by GLS1 Electronics.
Results obtained serial # GLS17320 CPU , GLS17321 Video
Test table version: Galaga 2004-3.tbl version 4.1c March 01, 2004 6:57am
Date of certify: June 01, 2004 3:17:12 Pm Tested by: gls1
Board voltages: Cpu board voltage: 5.05 volts Video board: 4.92 volts
Z-80 chip 4M Begin tests from socket 4M Galaga CPU PCB
Program chip 3N passes sequential and random access GG-2rev 0000-0FFF
Program chip 3M passes sequential and random access GG-2rev 1000-1FFF
Program chip 3L passes sequential and random access GG-2rev 2000-2FFF
Program chip 3K passes sequential and random access GG-2rev 3000-3FFF
Program version: identify program = GG-2 rev pass map address 0000-3FFF
74LS32 3P (1/4) initial tests indicate 32 3P ok enable ROM selection
74LS139 4P (1/2) ROM select 1 of 4 pass select individual ROM
74LS32 3P (2/4) initial tests indicate 32 3P ok output enable ROM
Begin buffer tests tested from sockets 4M 4J 4E CPU address & data buffer lines
Initial test ram preliminary tests indicate ram ok write/read RAM address
Screen GLS1 Logo visual test passed test pattern loaded
Dip Switch 6J dip switch actuate tests pass (d 1) 6840-6847 xxxx xx1x
Dip Switch 6K dip switch actuate tests pass (d 0) 6840-6847 xxxx xxx1
74LS151 4K (1-7/8) initial tests indicate 151 at 4K ok read dip switch 6J
74LS151 4K (8) performed tests verify 151 4K table mode input test
74LS151 5K (1-8) performed tests verify 151 5K read dip switch 6K
74LS393 6A (1/2) initial tests indicate 393 at 6A ok watchdog reset (*POR)
74LS128 6B (1/4) initial tests indicate 128 6B ok clear counter 393 6A
74LS259 3C (1-3/7) initial tests indicate 259 at 3C ok outputs q0 - q2
74LS107 1A (1/2) initial tests indicate 107 at 1A ok clear IRQ1 pin 6 output
74LS107 1A (2/2) performed tests verify 107 4K clear IRQ0 pin 2 output
74LS393 6A (2/2) performed tests verify 393 6A NMI ON - NMI3
74LS259 3C (4/7) initial tests indicate 259 3c ok Reset Z80's 4J and 4E
74LS259 3C (5/7) initial tests indicate 259 at 3C ok MOD0
74LS259 3C (6/7) initial tests indicate 259 at 3C ok MOD1
Reset switch performed tests verify reset reset Z80 4M and 259 3C
74LS259 3C (7/7) performed tests verify 259 3C MOD2 end of tests 3C
74LS128 6B (2-3/4) initial tests indicate 128 6B ok part of reset circuit
write zero to sound ram external test write verified write enable 7489 2B
7489 2B (1/16) initial tests indicate 89 2B ok 1st of 16 variables (0-15)
toggle pin 1 5C external test output verified A0 input of GG1-2 5C
74LS138 1P performed tests verify 138 1P end of tests 1P
74LS32 4C (1/4) initial tests indicate 32 4C ok to pin 3 1P
74LS138 2P performed tests verify 138 2P end of tests 2P
74LS367 1N (1-6) performed tests verify 367 1N xxxxxxxxxx111111
74LS367 1M (1-6) performed tests verify 367 1M xxxx111111xxxxxx
74LS367 1L (1-4) initial tests indicate 367 1L ok 1111xxxxxxxxxxxx
Custom 08 2J initial tests indicate custom 08 2J ok Buffer data direction
74LS139 4P performed tests verify 139 4P end of tests 4P
74LS32 4C (2/4) initial tests indicate 32 4C ok part of 2 horiz
start video board test initial tests indicate video board ok
End buffer tests Z80 Socket buffer tests verify
Z-80 chip location 4J Begin tests from socket 4J, CPU Galaga CPU PCB
Program chip 3J passes sequential and random access Galaga 3J 0000-0FFF
Program version: rapid fire verified GG2-rev compatible rapidv2.732
74LS32 3P (2/2) performed tests verify 32 3P end of tests 3P
74LS139 6C (2/3) initial tests indicate 139 6C ok
Screen GLS1 Logo visual test passed test pattern loaded
Read / Write Ram tests indicate bi-directional pass
Custom 08 2H initial tests indicate custom 08 2H ok
74LS139 6C (3/3) performed tests verify 139 6C end of tests 6C
repeat buffer tests performed tests verify buffer
74LS367 1K (1-6) performed tests verify 367 1K xxxxxxxxxx111111
74LS367 1J (1-6) performed tests verify 367 1J xxxx111111xxxxxx
74LS367 1E (1-2/6) initial tests indicate 367 1E ok xx11xxxxxxxxxxxx
74LS367 1L (5-6) performed tests verify 367 1L 11xxxxxxxxxxxxxx
start video board test indicate test 2 of 3 ok
Z-80 chip 4E Begin tests from socket 4E, CPU Galaga CPU PCB
Program chip 3E passes sequential and random access
Program version: program verified version 2 galaga3e.732
74LS32 4C (3-4) performed test verify 32 4C end of tests 4C
74LS139 4B (2/3) initial tests indicate 139 4B ok ROM select 1 of 1
Screen GLS1 Logo visual test passed
Read / Write Ram initial tests indicate bi-directional ok
Custom 08 2E initial tests indicate custom 08 2E ok
74LS139 4B (3/3) performed tests verify 139 4B end of tests 4B
repeat buffer tests performed tests verify buffer ok
74LS367 1H (1-6) performed tests verify 367 1N xxxxxxxxxx111111
74LS367 1F (1-6) performed tests verify 367 1F xxxx111111xxxxxx
74LS367 1E (3-6) performed tests verify 367 1E 1111xxxxxxxxxxxx
Begin video board tested from sockets 4M 4J 4E CPU serial # GLS17321
RAM chip 1K random read-write operations pass 8000-87FF
74LS245 2K performed tests verify 245 2K data path for RAM 1K
2114 RAM 3K and 3L random read-write operations pass 9400-97FF
74LS245 2J performed tests indicate 245 2J data path for RAM 3K 3L
2114 RAM 3H and 3J random read-write operations pass 9C00-9FFF
74LS245 2H performed tests indicate 245 2H data path for RAM 3H 3J
2114 RAM 3E and 3F random read-write operations pass 8C00-8FFF
74LS245 2F performed tests indicate 245 2F data path for RAM 3E 3F
Load grid pattern visual tests passed test pattern loaded
Red screen visual tests passed
Green screen visual tests passed
Blue screen visual tests passed
Black screen visual tests passed
White screen visual tests passed
Color bar pattern visual tests passed
Character set 4L visual tests passed test pattern loaded
ROM 4L 2600J Performed tests indicate ROM 4L ok text character data
Color prom 2N Performed tests indicate GG1-4 ok
74LS257 5M tests indicate "B" inputs ok (1/2)
Attract mode screen visual tests passed test pattern loaded
Flip screen Invert screen image pass 259 5K output
Custom chip 00 1L Initial tests indicate custom 00 1L ok invert video ram addresses
Begin star background tests
Zero all ram Blank screen pass visual only stars remain
74LS86 6N performed tests verify 86 6N
74LS273 2L performed tests verify 273 2L
stopped stars visual tests passed 259 5K output
star speed tests visual tests passed 259 5K output
reverse direction stars visual tests passed 259 5K output
custom chip 05 4M initial tests indicate custom 05 4M ok star data outputs
74LS259 5K performed tests verify 259 5K modify 05 chip input data
attract mode screen visual tests passed text screen loaded
74LS138 1E performed tests verify 138 1E end of tests 1E
74LS32 1F performed tests verify 32 1F end of tests 1F
74LS08 1D performed tests verify 08 1D end of tests 1D
74LS00 3M initial tests indicate 00 3M ok
74LS377 2M performed tests indicate 377 2M end of tests 2M
Custom chip 02 4H initial tests indicate 02 4H ok (1/2) shift register for text
Begin moving character tests
Attract mode screen 2 test pattern passed test pattern loaded
Remove text visual tests passed only moving chr remain
74LS257 5M tests indicate "A" inputs ok (2/2) 4 bit color data for text
74LS257 5M visual tests priority 257 5M ok text priority = less
74LS20 5L performed tests verify 20 5L controls 5M output
mov character select selected tests passed
74LS273 2C performed tests verify 273 2C
74LS273 2E performed tests verify 273 2E
74LS86 3B performed tests verify 86 3B
mov character spin / tilt visual tests passed modify a0-a2 chr ROM
74LS153 1B performed tests verify 153 1B
ROM 4D 2732 performed tests verify ROM 4D
ROM 4F 2732 performed tests verify ROM 4F
mov character position positioning tests start test pattern loaded
position select horiz horizontal control tests passed user interface open
position select vertical vertical control tests passed user interface
position select diagonal scroll diagonal pass tests user interface
74LS283 3D performed tests verify 283 3D address match 0-16
74LS283 3C performed tests verify 283 3C address match 32-256
74LS86 4C performed tests verify 86 2C
74LS20 2B performed tests verify 20 2B Character data sum
74LS161 5E performed tests verify 161 5E Even lines 0-16
74LS161 5D performed tests verify 161 5D Even lines 32-256
74LS161 5C performed tests verify 161 5C Even lines 512-1024
74LS161 5J performed tests verify 161 5J Odd lines 0-16
74LS161 5H performed tests verify 161 5H Odd lines 32-256
74LS161 5F performed tests verify 161 5F Odd lines 512-1024
74LS157 5A Initial tests indicate 157 5A ok
74LS20 3A 1/2 Initial tests indicate 20 3A ok Mov character data sum
mov character flip visual tests passed
74LS86 4C performed tests indicate 86 4C ok
positioning tests end
mov character color moving character color test begin
load chr color pattern test pattern passed visual
74LS377 2D Performed tests indicate 377 2D ok
Color prom 1C Performed tests GG1-3 ok
74LS20 3A 2/2 Performed tests indicate 20 3A ok
74LS157 5A Performed tests indicate 157 5A ok
mov character integrity visual interlace tests
74LS365 5A 74LS365 5A
74LS365 6A 74LS365 6A
2147 6F Performed tests indicate 2147 6F ok data bit even 0
2147 6E Performed tests indicate 2147 6E ok data bit even 1
2147 6D Performed tests indicate 2147 6D ok data bit even 2
2147 6C Performed tests indicate 2147 6C ok data bit even 3
2147 6M Performed tests indicate 2147 6M ok data bit odd 0
2147 6L Performed tests indicate 2147 6L ok data bit odd 1
2147 6K Performed tests indicate 2147 6K ok data bit odd 2
2147 6J Performed tests indicate 2147 6J ok data bit odd 3
74LS298 5B Performed tests indicate 298 5B ok Combine even and odd
Custom chip 02 4H Tests indicate 02 4H ok (2/2) Shift register mov chr
Custom chip 04 1H Tests indicate 04 1H ok
Custom chip 07
Resistance RM 20 Verified within specifications, using digital multimeter
Resistance RM 17 Verified within specifications, using digital multimeter
Resistance RM 18 Verified within specifications, using digital multimeter